CV

Education

• Ph.D. at the Technion 2019
• M.Sc. at the Technion (during studying towards PhD)
• B.Sc. in Computer Enginnering (Summa cum laude) at the Technion, 2009

Work experience

• 2023 - now: Huawei, Skyline
  • Head of CPU architecture Research group
• 2020 - 2022: Toga Networks (Huawei Israel research center)
  • Core Architect
  • Advanced Technology Group leader
• 2005 - 2019: Intel Haifa
• Performance architect at the core team, modeling and simulation for the OOO cluster, the FE and the L2 + HW prefetchers
• Core Architect (HW prefetcher, SMT, QoS)

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